1. Field of the Invention
The present invention relates generally to the field of memory module testing, and more particularly, to an improved MUT (module-under-test) or MUT unit for testing memory modules.
2. Description of the Prior Art
As known in the art, a memory module test system or a memory module tester is commonly used for testing and detecting assembly errors on the memory modules. Typically, a memory module tester may comprise handlers that are able to automatically insert memory modules into sockets on the MUT units. The tested memory modules are then sorted into a “bin” for modules that have passed or failed the test. In the high-volume production environment where time is of the essence, the automatic memory-module handler saves labor and streamlines the manufacturing process.
However, the prior art memory module tester still has some drawbacks. FIG. 1 is a schematic, cross-sectional diagram showing an MUT 10 in accordance with the prior art. As shown in FIG. 1, the MUT 10 may comprise two printed circuit boards (PCBs) 20a and 20b, which are vertically oriented with respect to each other, and a plurality of L-shaped pins 12 for electrically connected the PCBs 20a and 20b. A handler (not shown) inserts a memory module 40 into a socket 30 mounted on a top surface of the PCB 20a. It has been found by the inventor that the L-shaped pins 12 are liable to become detached from one of the printed circuit boards (PCBs) 20a/20b at the welding point over a period of time, thereby causing poor contact and decreased yield of the testing.